STEP 7-Micro/WIN 32 Compiler Errors

Error Listing

The Compile All command compiles all three blocks in the following order.

1.Program Block (OB1, all subroutines, all interrupt routines)

2.Data Block (DB1)

3.System Block (SDB0)

The Compile command compiles the current block. The current block is the active editor.

During a compilation of the Program Block (OB1, all subroutines, all interrupt routines), the compiler follows the rules below when compiling each individual network.

1.The compiler checks for calls to non-existent subroutines.

2.The compiler checks for invalid calls to subroutines.

3.The compiler checks for illegal syntax for instruction operands.

4.The compiler validates each instruction operand, and, in the case of IEC 1131-3, the compiler resolves overloaded instructions.

5.The compiler checks for invalid network constructs.

6.The compiler checks for errors due to features not present in the PLC selected.

The STEP 7-Micro/WIN 32 compiler error codes are listed below.

Error Code Description
1 The use of ENO is not supported by the PLC type selected.
2 Illegal operand combination. The direct address operand in OUT cannot contain any of the bytes of the direct address in IN2.
3 Illegal operand combination. The direct address operand in OUT cannot contain any of the four bytes of the indirect address in IN2.
4 Illegal operand combination. The same direct address accumulator in OUT cannot be used as an indirect address accumulator in IN2.
5 Illegal operand combination. The direct address operand in OUT cannot have one of the least significant bytes contain any of the bytes of the direct address in IN2.
6 Illegal operand combination. The direct address operand in OUT cannot have one of the least significant bytes contain any of the four bytes of the indirect address in IN2.
7 Illegal operand combination. The indirect address operand in OUT cannot contain any of the bytes of the direct address in IN1.
8 Illegal operand combination. The indirect address operand in OUT cannot contain any of the four bytes of the indirect address in IN1 or IN2.
9 Illegal operand combination. The accumulator operand in OUT cannot be the same accumulator used in IN1.
10 Illegal operand combination. The accumulator operand in OUT cannot be the same accumulator used in IN2.
11 The instruction is not supported by the PLC type selected.
12 Parameterized subroutines are not supported by the PLC type selected.
13 The conditional END instruction is not supported by the PLC type selected.
14 Subroutines are not supported by the PLC type selected.
15 Cannot resolve the overloaded instruction. At least one of the operands must be a local or global variable that has an associated data type.
16 Cannot resolve the overloaded instruction. Not all overloaded operands have the same size or data type.

32 Illegal syntax for the instruction operand.
33 Undefined global symbol or local variable for the instruction operand.
34 The addressing mode is not valid for the instruction operand.
35 The memory area is not valid for the instruction operand.
36 The size or data type is not valid for the instruction operand.
37 The memory addressing range is not valid for the instruction operand.
38 Generic instructions must be defined before they can be compiled.
39 The call instruction does not have a corresponding subroutine.
42 Invalid indirect memory area.
43 Invalid analog input or output address.
44 Open circuit.
45 Short circuit.
46 Reverse power flow.
47 Invalid network or network too complex to be compiled.
48 The positive transition, negative transition, or NOT contact is illegally placed.
49 Counter instructions must be the only output in the network.
50 Unknown compilation error.
51 A LBL, NEXT, NOP, SCR, or SCRE instruction cannot have any other instructions in the same network.
52 A contact must proceed the output instruction.
53 The instructions END, RET, and RETI can only be used as conditional outputs. Unconditional use of these instructions is handled automatically by the compiler.
54 The network is missing an output instruction.
55 The use of literal/constant is illegal for the instruction operand.
56 The literal/constant value is out of range for the instruction operand.
57 The literal/constant type is not legal for the instruction operand.
58 Interconnecting the Boolean input logic with vertical wires is not allowed for multi-stack instructions (CTU, CTD, CTUD, SBRx).
59 Additional output instructions are not allowed in the same network with multi-stack instructions (CTU, CTD, CTUD, SBRx).

62 Duplicate use of a positive edge number
63 Duplicate use of a negative edge number
64 The instruction does not support the use of ENO.
65 Output coils do not support power flow out of the right side of the coil.
66 The instruction is not recognized as a valid standard instruction.
67 The number of operands does not match the standard instruction signature.

System Data Block Compile Errors and Warnings

2750 The selected PLC type does not support setting Port 1 options.
2751 The selected PLC type does not support setting Analog Input Filtering options.
2752 The selected PLC type does not support setting Pulse Catch Bits options.
2753 The selected PLC type does not support setting Output Table options.
2754 The selected PLC type does not support configuring the upper bytes of the Output Table.
2755 The Baud Rate specified for Port ' ' is illegal for the PLC type selected.
2756 Retentive Range ' ' is illegal for the PLC type selected.

Data Block Compile Errors

2770 The address specified has already been assigned a value.
2771 The address is not valid for the PLC type selected.
2772 Illegal syntax for the Data Block entry.
2773 The value is too large for the address specified.
2774 Exceeded internal token text size.
2775 Illegal DB Syntax.