Shift Right Double Word, Shift Left Double Word Shift/Rotate

Inputs/Outputs Operands Data Types
IN (LAD, FBD) VD, ID, QD, MD, SD, SMD, LD, AC, HC, Constant, *VD, *AC, *LD DWORD
N VB, IB, QB, MB, SB, SMB, LB, AC, Constant, *VD, *AC, *LD BYTE
OUT VD, ID, QD, MD, SD, SMD, LD, AC, *VD, *AC, *LD DWORD

Memory Ranges ENO Errors Instruction Support for S7-200 CPUs SIMATIC/International Mnemonics
The Shift Right Double Word and Shift Left Double Word instructions shift the input double word value (IN) right or left by the shift count (N), and load the result in the output double word (OUT).

The shift instructions fill with zeros as each bit is shifted out. If the shift count (N) is greater than or equal to 32, the value is shifted a maximum of 32 times. If the shift count is greater than 0, the overflow memory bit (SM1.1) takes on the value of the last bit shifted out. The zero memory bit (SM1.0) is set if the result of the shift operation is zero.

Note that the sign bit is shifted when you are using signed data types.

Error Conditions that Set ENO = 0:

0006 (indirect address), SM4.3 (run-time)

These instructions affect the following Special Memory bits:

SM1.0 (zero); SM1.1 (overflow)