Shift Register Bit Shift/Rotate

Inputs/Outputs Operands Data Types
DATA, S_BIT I, Q, M, SM, T, C, V, S, L BOOL
N VB, IB, QB, MB, SMB, LB, AC, Constant, *VD, *AC, SB, *LD BYTE

Memory Ranges ENO Errors Instruction Support for S7-200 CPUs SIMATIC/International Mnemonics
The Shift Register Bit instruction shifts the value of DATA into the Shift Register. S_BIT specifies the least significant bit of the Shift Register. N specifies the length of the Shift Register and the direction of the shift (Shift Plus = N, Shift Minus = -N).

Each bit shifted out by the SHRB instruction is placed in the overflow memory bit (SM1.1).

Error Conditions that Set ENO = 0:

0006 (indirect address), 0092 (error in count field), 0091 (operand out of range), SM4.3 (run-time)

This instruction affects the following Special Memory bits:

SM1.1 (overflow)


Example