Reset Dominant Bistable Bit Logic

Inputs/Outputs Operands Data Types
S, R1 (LAD) Power Flow BOOL
S, R1 (FBD) I, Q, M, SM, T, C, V, S, L, Power Flow BOOL
OUT (LAD) Power Flow BOOL
OUT (FBD) I, Q, M, SM, T, C, V, S, L, Power Flow BOOL
xxx I, Q, M, V, S BOOL

Memory Ranges ENO Errors Instruction Support for S7-200 CPUs SIMATIC/International Mnemonics
The Reset Dominant Bistable (RS) is a latch where the reset dominates. If the set (S) and reset (R1) signals are both true, the output (OUT) will be false.

The xxx function block parameter specifies the Boolean parameter that is set or reset. The optional output reflects the signal state of the xxx parameter.