|IN (LAD, FBD)||VD, ID, QD, MD, SMD, LD, AC, HC, Constant, *VD, *AC, SD, *LD||DWORD|
|N||VB, IB, QB, MB, SMB, LB, AC, Constant, *VD, *AC, SB, *LD||BYTE|
|OUT||VD, ID, QD, MD, SMD, LD, AC, *VD, *AC, SD, *LD||DWORD|
|Memory Ranges||ENO||Errors||Instruction Support for S7-200 CPUs||SIMATIC/International Mnemonics|
|The Rotate Right Double Word and Rotate Left Double Word instructions rotate the input double word value (IN) right or left by the shift count (N), and load the result in the output double word (OUT).
The rotation is circular. If the shift count (N) is greater than or equal to 32, a modulo–32 operation is performed on the shift count (N) before the rotation is executed. This results in a shift count of 0 to 31. If the shift count is 0, a rotation is not performed. If the rotation is performed, the value of the last bit rotated is copied to the overflow bit (SM1.1).
If the shift count is not an integer multiple of 32, the last bit rotated out is copied to the overflow memory bit (SM1.1). The zero memory bit (SM1.0) is set when the value to be rotated is zero.
Rotate right and rotate left double word operations are unsigned.
Error Conditions that Set ENO = 0:
0006 (indirect address), SM4.3 (run-time)
These instructions affect the following Special Memory bits:
SM1.0 (zero); SM1.1 (overflow)