Inputs/Outputs |
Operands |
Data Types |

IN1, IN2 | VD, ID, QD, MD, SMD, SD, LD, AC, Constant, *VD, *AC, *LD | REAL |

OUT | VD, ID, QD, MD, SMD, SD, LD, AC, *VD, *AC, *LD | REAL |

Memory Ranges | ENO | Errors | Instruction Support for S7-200 CPUs | SIMATIC/International Mnemonics | ||

The Multiply Real instruction multiplies two 32-bit real numbers, and produces a 32-bit real number result (OUT).
The In LAD and FBD: IN1 * IN2 = OUT IN1 / IN2 = OUT In STL: IN1 * OUT = OUT OUT / IN1 = OUT
SM1.1 (overflow), SM1.3 (divide-by-zero), SM4.3 (run-time), 0006 (indirect address) These instructions affect the following Special Memory bits: SM1.0 (zero); SM1.1 (overflow or illegal value generated during the operation or illegal input parameter found); SM1.2 (negative); SM1.3 (divide-by-zero) If SM1.3 is set during a divide operation, then the other math status bits are left unchanged and the original input operands are not altered. SM1.1 is used to indicate overflow errors and illegal values. If SM1.1 is set, then the status of SM1.0 and SM1.2 is not valid and the original input operands are not altered. If SM1.1 and SM1.3 are not set during a divide operation, then the math operation has completed with a valid result and SM1.0 and SM1.2 contain valid status. |

**Note**

Real or floating-point numbers are represented in the format described in the ANSI/IEEE 754-1985 standard (single-precision). Refer to the standard for more information.

**Example**